新書推薦：
《
何以为名
》
售價：NT$
265.0
《
时刻人文·1723：世界史的10扇窗（从全球史中的10位人物，管窥18世纪世界的格局与变化）
》
售價：NT$
347.0
《
躺椅和舞台
》
售價：NT$
434.0
《
甲骨文丛书·日本社会的历史
》
售價：NT$
556.0
《
最后的捕鲸部落
》
售價：NT$
296.0
《
家族企业代际传承对技术创新的影响机制与治理对策研究
》
售價：NT$
500.0
《
国家及其废墟：希腊的古代、考古学与民族想象
》
售價：NT$
398.0
《
社会学科学导论
》
售價：NT$
1520.0
|
| 目錄：
|
Contents
Preface
1 Introduction to NoC 1
1.1 Development of Computer Architecture 1
1.2 Chip Multiprocessor 3
1.3 On-chip Structure and NoC 6
1.4 Summary 10
2 Hybrid Network and Bus On-Chip Interconnection 11
2.1 Introduction 11
2.2 Hybrid On-chip Interconnection with NoC and the Bus 13
2.2.1 Motivation 13
2.2.2 On-Chip Structure 14
2.2.3 Support for Thread Scheduling 15
2.2.4 Experiments and Results 16
2.3 Dynamic Configurable On-Qiip Network with the Hybrid Bus and Networks 18
2.3.1 Motivation 18
2.3.2 BusNoC Hybrid Interconnection 19
2.3.3 Component Design 21
2.3.4 Experiment and Results 23
2.4 Summary 28
3 On-Chip Structure and Optimizations 30
3.1 Introduction 30
3.2 Dynamic Reconfigurable Networks for IO-Supported Parallel Applications 31
3.2.1 Background 31
3.2.2 Architecture Design 33
3.2.3 Implementation 37
3.2.4 Experiments and Analysis 42
3.3 Critical Path-Driven Routers for the On-Chip Network 46
3.3.1 Background 46
3.3.2 Motivation 48
3.3.3 Architecture 51
3.3.4 Implementation 53
3.3.5 Experiments and Analysis 56
3.4 Transmission Bypass Optimization for On-Chip Cores 60
3.4.1 Background 60
3.4.2 Motivation 61
3.4.3 Design 62
3.4.4 Implementation 65
3.4.5 Experiments and Analysis 68
3.5 Summary 75
4 On-Chip Networked Memory System for NoC 77
4.1 Introduction 77
4.2 Network Main Memory Architecture for NoC 78
4.2.1 Background 78
4.2.2 Motivation 80
4.2.3 Basic NMM Architecture 81
4.2.4 Management of NMM and Software Model 85
4.2.5 Experiments and Analysis 87
4.3 Distributed Memory Management Units Architecture for NoC 94
4.3.1 Background 94
4.3.2 Motivation 98
4.3.3 Architecture Model 100
4.3.4 Experiments and Analysis 104
4.4 Summary 108
5 Efficient Task Mapping Algorithm with Low-Power Design for NoC 110
5.1 Introduction 110
5.2 Efficient Task Mapping Algorithm with Power-Aware Optimization for NoC 111
5.2.1 Background Ill
5.2.2 Motivation 112
5.2.3 System Model 114
5.2.4 Proposed Algorithm Design 119
5.2.5 Experiments and Analysis 129
5.3 Energy-Efficient Design of the Microkernel-Based On-Chip OS for NoC 133
5.3.1 Background 133
5.3.2 Motivation 134
5.3.3 Design Overview 136
5.3.4 Distributed On-Chip Operating System 139
5.3.5 Experimental Results and Analysis 144
5.4 Summary 151
6 Conclusions 153
References 156
|
|
購物車/收銀台(0) | 在線留言板
| 付款方式
| 聯絡我們
| 運費計算
| 幫助中心 |
加入書簽
HOME
新書上架
